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Micron Maps DRAM Scaling and Processor Mounted Memory

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October 28, 2026

October 28, 2026 / SemiMedia / — Micron has outlined a DRAM roadmap that combines new manufacturing processes with memory designed to sit directly above processors. The plans include wafer bonding at the 1ε node, High NA EUV lithography in later generations, and vertical memory for AI systems.

The company says its 1γ DRAM is in high volume production. Its successor, 1δ, is expected to begin volume ramp in the second half of 2027, with a bit density increase in the mid 20 percent range over 1γ. The node is intended to support future products including HBM5, vertical HBM and vertical edge inference memory.

Micron plans to introduce wafer bonding with the subsequent 1ε process, but has not detailed its implementation or quantified its expected benefits. For later generations, the roadmap includes High NA EUV and new materials. Micron is also working with Albany NanoTech on advanced lithography for the longer term.

The company is pursuing 3D DRAM alongside further planar scaling. Its roadmap lists 3D1 and 3D2, without specifying architectures or launch dates. President and Chief Technology and Products Officer Scott DeBoer said deployment will depend on the balance of cost, complexity and device performance.

Vertical HBM is intended to place memory stacks above an AI processor. Shorter connections could increase bandwidth and reduce latency, but the arrangement also complicates cooling and limits the number of stacks that can be mounted above the chip. Micron expects it to complement conventional HBM.

Vertical edge inference memory, or vEIM, applies a similar integration approach to power constrained devices such as autonomous vehicles and robots. The first generation targets 2 TB/s of bandwidth at less than 1 pJ per bit. Micron also plans custom HBM designs tailored to customer requirements.

The vertical designs depend on dense interconnects and thermal management. Micron is developing heat spreading structures to move heat away from hot regions of the memory base die through the DRAM stack. Commercial production dates for vHBM, vEIM and custom HBM have not been disclosed.

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