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IBM strengthens alliance with Rapidus to target sub-1nm chip technologies

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July 3, 2025

July 3, 2025 /SemiMedia/ — IBM is expanding its partnership with Japan's Rapidus to co-develop semiconductor technologies below the 1nm node, building on their ongoing 2nm collaboration. The move reinforces both companies' commitment to accelerating next-generation chip manufacturing amid intensifying global competition.

Mukesh Khare, general manager of IBM’s semiconductor R&D, said the company aims to establish a long-term relationship with Rapidus, which could include delegating future sub-1nm chip production to the Japanese foundry. As part of this effort, around 10 IBM engineers have been dispatched to Rapidus’ facility in Chitose, Hokkaido, to support process ramp-up and technical integration.

The partnership was first formalized in June 2024 under a project funded by Japan's New Energy and Industrial Technology Development Organization (NEDO), focusing on 2nm chiplet integration and advanced packaging. By December 2024, the joint team had achieved a breakthrough with a method called "selective layer reduction," enabling consistent production of multi-Vt nanosheet GAA transistors—crucial for low-power, high-performance computing.

IBM has reaffirmed its support for Rapidus’ target of achieving 2nm chip mass production by 2027, marking a significant step in Japan’s re-entry into the leading edge of chipmaking.

Analysts view the IBM–Rapidus alliance as a strategic effort to diversify and regionalize semiconductor supply chains, while fostering new innovation platforms for future node development.

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