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Home › Manufacturer › Renesas releases DDR5 data buffer for high-performance server and cloud service applications
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Renesas releases DDR5 data buffer for high-performance server and cloud service applications

SemiMediaEdit
September 11, 2020

Renesas Electronics announced a new high-speed, low-power DDR5 data buffer for data center, server, and high-performance workstation applications.

Advancements over the past few years in real-time analytics, machine learning, HPC, AI, and other memory and bandwidth-hungry applications have fueled explosive growth in server memory bandwidth requirements. The new JEDEC-compliant DDR5 data buffer 5DB0148 from Renesas enables significantly higher speeds and lower latency for load-reduced dual inline memory modules (LRDIMMs) that have become the cornerstone memory technology for this new class of applications. The first generation of DDR5 LRDIMMs based on Renesas components enable a bandwidth increase of more than 35 percent over DDR4 LRDIMMs operating at 3200 MT/s.

“As the industry’s complete DDR5 solution provider, we are working closely with customers and ecosystem partners to launch a vastly expanded portfolio of memory solutions into production,” said Rami Sethi, Vice President, Data Center Business Division at Renesas. “Our DDR5 data buffers are critical to enabling high performance DRAM solutions such as LRDIMMs, alternative high density modules and heterogeneous memory solutions, all of which empower a new generation of high performance computing applications.”

The Renesas DDR5 Data Buffer maximizes channel eye opening for systems that are heavily loaded through a combination of capacitive load reduction, data alignment, and signal recovery techniques. This allows server motherboards with a large number of memory channels and slots and complex routing topologies to run at maximum speed, even when fully populated with high-density memory. Additionally, improvements in the DDR5 modules definition allow for lower power supply voltages (1.1V vs 1.2V in DDR4), on-DIMM voltage regulation, and implementation of advanced control plane architectures with the use of the SPD Hub and modern control bus communications such as I3C.

The DDR5 data buffer 5DB0148 is sampling to qualified customers. For additional information, visit www.idt.com/5db0148.

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